FAQ

How to upload a custom signal?

Uploading a custom signal can be done with the Module Memory commands. First select the module with the command C. The set the memory address counter to zero using the command MMA. Now the signal can be uploaded using hexadecimal codes with the command MML.

NOTE: The 18 bits dac codes should be placed in the upper 18 bits of a 24 bits word (shift 6 places to the left).

After filling the module memory with the custom signal, the address counter (MMA) should be set to the beginning of the pattern (usual zero). Then the stop address (MMS) should be configured for the last pattern address. After preparing the module for signal generation (MLOCK), the signal should appear on the output when a clock (CS) is present.

Examples:

Fill DIO with custom pattern of 3 steps.

0MMA0	Select DIO (location 0) and set address counter to zero
MML0	Write code 0 to address 0
MML80	Write code 0x80 to address 1
MMLFF	Write code 0xFF to address 2

Fill AWG18 with custom pattern of 3 steps and prepare module for signal generation.

[2MLOCK0]	Only requered if module is in signal generation mode: set module back in configuration mode
2MMA0	Select AWG18 (location 2) and set address counter to zero
MML0	Write code 0 to address 0
MML2000	Write code 0x80 (shift left 6 position) to address 1
MML3FC0	Write code 0xFF to address 2
MMA0	Set address counter back to 0
MMS2	Set stop address at 2
MLOCK1	Set module in signal generation mode

The module will generate a signal if the clock is applied. Use CS2 for an external clock source. If an internal clock source is selected (CS0 = BHSO or CS1 = BHSI) The pattern bit generator of the DIO must be programmed and started. Program the DIO pattern bit generator using the PBx commands. Start the pattern bit generator using the command MLOCK.

How to generate a custom signal with the AWG18?

See the also the previous faq for uploading a custom signal.

An other method can be done by modifying a command file generated by ATView 7. In ATView 7, open the Measurement Settings window. Prepare the command file and save the command file (button "Save settings"). Open this file in an editor and replace the command SF with the commands MMA and MML. The number of stimuli samples (= the setting of the stop address MMS) will be equal to SS for MT2 and MT12 (dynamic tests). For MT2 and MT12 (ramp tests) this will be equal to SS + SC. Now send the command file to the ATX7002 using ATCom, the LabView driver or using the option "Associate the command file with window" from the menu Test in ATView 7.

How to configure a serial DA converter test?

Practical question:
I want to test a 12 bit serial D/A converter. The DIO is set in IO mode 30: serial output MSB first. When I start the pattern generator the serial data output pin at the DIO connector (D0) does not change state during the generation of serial stimulus data. I use SerClk (PB9) to clock the internal shift register. What is wrong?

Answer:
Before stimulus data can shift out of the DIO shift register, it should be parallel loaded. In parallel output mode BHSO(PB11) has a double function. It increments the stimulus address counter and it is used as parallel load signal for the shift register. A parallel load is done with the following pattern bit sequence: BHSO is set logic high. Then the load occurs on a positive edge of SerClk (PB9) after that, BHSO can be taken low again. After this, the contents of the shift register is shifted out with SerClk. When there’s no SerClk edge while BHSO is high, the shift register is not loaded with data. In that case there will be no data changes on D0. When "serial out, MSB first" is chosen as output mode, all 24 bits of the shift register should be shifted out. Otherwise the Least significant bits will not appear at pin D0. If the device under test is a 12 bit serial DAC, the first device serial clock starts when D11 appears at the D0 output.

What are the AWG18 clock requirements?

The maximum update rate of the AWG18 is 1 MHz. The minimum high time is 100ns. The AWG18 clock to Vout response is:

How to change the communication settings?

The communication settings of ATView 7 can be change from the Main Menu. Select Communication Setttings of the menu Options.

The communicaton settings of the ATX7002 can be changed with the the 2 buttons on the front of the ATX7002.

How to update the firmware?

For a correct firmware-update of the ATX7002, please follow the next instructions:

1. Turn off the ATX7002. Press the Enter button (on the right side) at the front of the Controller and turn ATX7002 on. Keep Enter button pressed while turning the ATX7002 on. The message "Program mode" will be displayed. Please check if power cable and communication cable are connected firmly before going to the next step.
2. Select Options->Update firmware in ATView 7 (Main Menu). Press "Load file" and select the file a7vxxx.i0 (xxx = version number). Press "Upload & Program" and wait till programming is ready. The ATX7002 display will show the message "Prog. ready".
3. Reset the ATX7002. The ATX7002 should start normally.

What are the LEMO connector pinouts?

What is the DIO connector pinout?

DIO pinout or MFDIO in normal mode:

MFDIO pinout in high speed mode:

What is the RS232 connector pinout?