A/D Converter histogram test

Introduction

Linearity calculations of an A/D converter are based on the transition points. Applying an accurate ramp to the input of the converter is one method of performing a static analysis. The exact applied input voltages should be known by the transition point (or trip-point) calculating algorithm. More information about this method can be found in the article static characterization.

The Histogram (or code density) method is an other popular techniques for ADC testing. There are two common used histogram methods: the linear ramp and sinusoidal.

Linear ramp

ADC linear histogram test input signal

The linear ramp simply applies one or more rising or falling linear ramps to the input of the AD converter. The number of occurrences (or hits) of each code is directly proportional to the width of the code. If the code hits of a specified code is higher than the average, the step is wider than one LSB converter step. This indicates a positive dnle. If the code hits of a specified code is less than the average, the step is smaller than one LSB converter step. This indicates a negative dnle.

ADC linear histogram test code hits

Code 0 and the last code are meaningless. The code occurrences of both codes can be less or much more and so these code width are undefined. The code occurrences of both codes are ignored in the linear ramp histogram calculations.

Since each code occurrence stands for a DNLE of each step, adding these DNL errors will result in an INLE curve.

The number of applied steps per code determine the measurement resolution. E.g. if the number of steps per ADC code is 10 (e.g. 2560 steps for an 8 bit converter), the measurement resolution is 1/10 LSB.

Sinusoidal

The sinusoidal method applies a sinewave signal with one or more periods to the input of the AD converter.

Some differences between the sinusoidal histogram test and the linear ramp test:

  • Usually it is easier to produce an pure sinewave than an accurate linear ramp.
  • The linear test is a static performance test, the sinusoidal a dynamic performance test.
  • The linear test has an even distribution of voltages, the sinusoidal an uneven voltage distribution. A sinewave has more voltage steps near the lower and upper voltages.
ADC sinusoidal histogram test code hits

The uneven distribution of voltages for the sinusoidal test must be compensated to recontruct the ideal code occurrences of each code. For this normalization process it is necessary to know the offset and amplitude of the signal. The number of hits at the upper and lower codes in the histogram can be used to calculate offset and amplitude of the input signal.

Xu = cos ( π Nu Ns ) Xl = cos ( π Nl Ns )

Offset(LSBs) = ( Xl - Xu Xl + Xu ) * ( 2 N - 1 - 1 )

Peak(LSBs) = 2 N - 1 - 1 - Offset Xu

Nu is the number of times the upper code is hit, Nl is the number of times the lower code is hit, Ns is the number of samples (total sum of code occurrences), and N is the converter resolution, in bits.

Once the offset and amplitude are known, the ideal distribution of code hits can be calculated.

IdealCount(Code) = Ns 𝜋 [ arcsin ( Code + 1 2 𝑁 1 Offset Peak ) arcsin ( Code 2 𝑁 1 Offset Peak ) ]

The following equation can be used to determine the required stimuli steps of the input signal for a required measurement resolution:

Stimuli steps = 𝜋 2 𝑁 1 ( Z α 2 ) 2 𝛽 2

Where N stands for the number of ADC bits, Zα/2 for the confidence level and β for the DNLE resoltion in LSBs.

Example: 10 bit ADC with a required DNLE measurement resolution (β) of 0.1 LSB and a confidence level of 95% (Zα/2):
Stimuli steps = 𝜋 2 9 1.96 2 0.1 2 = 617920 samples.

Common values for the confidence level (Zα/2) are:

  • 90% : 1.645
  • 95% : 1.96
  • 99% : 2.576

Stimuli steps calculator


ADC bits:
DNLE resolution (LSB):
Confidence level:

ATX7006

The histogram test calculations can be performed on the ATX7006 with the command CALC_HIST.

The histogram test calculations can be configured with the commands:


Results are available with the commands: